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" #$%&' ( (unit: mm) 23.1 max. 2.54 min. 0.2 min. 6.3 4.2 #1 #18 #9 #10 "$%&' ! ')% * " $%&' ! ')% * (v dd ) and v dd are to have the same level of voltage . do not connect it to any external terminals. #1 #24 #12 #13 " #$%&' ( (dip 18-pin) " #$%&' (ssop 24-pin) " #$%&' 2.0 max. 0 min. 7.62 0.25 10.5 max. 5.4 8.1 max. 0.5 0.15 no. 1 2 3 4 5 6 7 8 9 no. 18 17 16 15 14 13 12 11 10 cs 0 fout irq a 0 a 1 a 2 a 3 rd gnd v dd ( v dd ) ( v dd ) cs 1 d 0 d 1 d 2 d 3 wr 90 to 105 0 to 10 no. 1 2 3 4 5 6 7 8 9 10 11 12 no. 24 23 22 21 20 19 18 17 16 15 14 13 cs 0 f con f out vtemp (v dd ) irq a 0 a 1 a 2 a 3 rd gnd v dd ( v dd ) ( v dd ) ( v dd ) ( v dd ) ( v dd ) cs 1 d 0 d 1 d 2 d 3 wr 0.8 0.36 2.54 0.46 pin terminal pin terminal pin terminal pin terminal metal may be exposed on the top or bottom of this product. this won't affect any quality, reliability or electrical spec. 4-bit real time clock module rtc-7301sf/dg ? built-in crystal oscillator 32.768 khz with frequency adjusted ? frequency selectable clock output (32.768 khz to 1/30 hz) ? built-in 30 second adjustment function, digital pace adjustment function (max. adjustment: 192 x 10 -6 ) ? built-in alarm and timer interrupt functions. ? built-in semiconductor temperature sensor (voltage output: -7.8 mv / ?, rtc-7301sf) ? operating voltage range:2.4 v to 5.5 v, time keeping voltage range: 1.6 v to 5.5 v ? low current consumption (0.6 a / 3 v typ.) ? high speed parallel interface compatible with sram item supply voltage input voltage output voltage(1) output voltage(2) storage temperature symbol v dd v in v out1 v out2 t stg condition v dd to gnd input terminal,d0 to d3 pins irq pin fout, d0-d3 pins, vtemp pin stored as bare product after unpacking max. + 7.0 v dd + 0.3 + 8.0 v dd + 0.3 +125 min. -0.3 gnd -0.3 gnd -0.3 gnd -0.3 -55 unit v ? item power voltage clock voltage operating temperature symbol v dd v clk t opr condition no condensation max. 5.5 5.5 + 85 min. 2.4 1.6 - 40 unit v v ? item frequency precision oscillation start-up time frequency temperature characteristics frequency voltage characteristics aging symbol ? f/fo t sta t op f/v fa ta=+25 ?, v dd = 3.0 v t a =+25 ?, v dd = 2.4 v ta=-10 ? to +70 ?, v dd = 3.0 v ta=+25 ?, v dd = 1.6 v to 5.5v t a =+25 ?, v dd = 3.0 v condition range 5 23 ? 3 max. +10/-120 ? ? unit x 10 -6 s x 10 -6 x 10 -6 /v x 10 -6 /year item current consumption (when non-accessed) fout =output off vtemp =output off symbol i dd1 i dd2 v dd = 5 v v dd = 3 v min. typ. 1.0 0.6 max. 2.0 1.0 unit ? ? condition actual size cs0,rd,wr=v dd a 0 -a 3 ,cs 1 =gnd d 0 -d 3 ,irq=hi-z fout=hi-z(off) v temp =hi-z(off) note)there is no vtemp pin on the RTC-7301DG so standards for the vtemp pin within the conditions described above do not apply. note)there is no temperature sensor function on the RTC-7301DG. item temperature output voltage output precision temperature sensitivity linearity temperature detection range output resistance load condition response time ta= +25 ?, gnd based output voltage vtemp pins, v dd =2.7 v to 5.5 v ta= +25 ?, v dd =2.7 v to 5.5 v -40 ? ta +85 ?, v dd =2.7 v to 5.5 v -40 ? ta +85 ?, v dd =2.7 v to 5.5 v ? nl ?.0 %, v dd =2.7 v to 5.5 v ta= +25 ?, vtemp pins, v dd =2.7 v to 5.5 v gnd standard and v dd standard v dd =2.7 v to 5.5 v v dd =2.7 v to 5.5 v v dd =3.3 v c l =50 pf, r l = 500 k ? , max. ? ? symbol vtemp t acr v se ? nl t sop r 0 c l r l t rsp min. -7.3 -40 500 typ. 1.470 -7.8 1.0 max. ?.0 -8.3 ?.0 +85 3.0 100 200 unit v ? mv/? % ? k ? pf k ? ? condition gnd=0v gnd=0v gnd=0 v,v dd =1.6 v to 5.5 v,ta= - 40 ? to + 85 ? gnd=0 v,ta= - 40 ? to + 85 ? real time clock module the details are mentioned in the application manual. http://www.epson device .com product number (please refer to page 2) q4 273018x000200 q4 273011x000200 ? please ask tighter tolerance rtc-7301sf RTC-7301DG
92 real time clock module cs 0 t rc t acc t acs t clz t olz t ohz t chz t chz t oh t acs t clz t ard cs 1 rd a 0 to a 3 d 0 to d 3
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cs 0 t wc t aw t cw t as t dw t dh t wr cs 1 wr a 0 to a 3 d 0 to d 3
cs 0 t wc t aw t as t dw t dh t wr cs 1 wr a 0 to a 3 d 0 to d 3 t wp bus interface circuit fout controller t emperature sensor divider f out vtemp irq a 0 to a 3 *this is a block diagram for rtc-7301sf. be aware that RTC-7301DG differs according to the following 2 points. *1)the vtemp output is not connected to an external pin. *2) the fcon input pin is not connected to an external pin, but is fixed at "h" internally. d 0 to d 3 rd wr f con *2 7301sf *1 *1 7301dg cs0 cs1 degital trimming register clock and calendar timer register alarm register control register and system controller interrupts controller osc 32.768 khz control line ?nd=0 v, ta= -40 c to + 85 c ?nput conditions: vi= 0.5 x vdd, vo= 0.5 x v dd ?utput load: cl= 100 pf (tacc,tacs,tard) 0 1 2 3 4 5 6 7 8 9 a b c d e f 8 f os 8 o 8 o o 8 o 8 o 8 80 800 test bank sel 1 4 40 4 40 4 o 4 4 o 4 o 4 40 400 temp bank sel 0 2 20 2 20 2 20 2 2 20 2 o 2 20 200 2000 stop 1 10 1 10 1 10 1 1 10 1 10 1 10 100 1000 busy/adj 1 second digit 10 second digit 1 minute digit 10 minute digit 1hour digit 10 hour digit day digit 1 day digit 10 day digit 1 month digit 10 month digit 1 year digit 10 year digit 100 year digit 1000 year digit control registers item read cycle time address access time ce access time rd access time ce output set time ce output floating rd output set time rd output floating output hold time write cycle time chip select time address valid end of write address setup time address hold time write pulse width input data set time input data hold time fout output frequency duty symbol t rc t acc t acs t ard t clz t chz t olz t ohz t oh t wc t cw t aw t as t wr t wp t dw t dh duty condition fout= 32.768 khz unit n s n s n s n s n s ns ns ns ns ns ns ns ns ns ns ns ns % min. 150 5 5 10 150 140 140 0 0 130 80 0 40 max. 150 150 100 60 60 60 max. 85 85 45 30 30 60 min. 85 3 3 5 85 70 70 0 0 65 35 0 40 address bit 3 bit 2 bit 1 bit 0 register 0 1 2 3 4 5 6 7 8 9 a b c d e f 8 ae 8 ae 8 ae ae 8 ae ctemp o fe test bank sel 1 4 40 4 40 4 4 4 cdt_on fd2 o temp bank sel 0 2 20 2 20 2 20 2 2 20 fd1 fd4 af stop 1 10 1 10 1 10 1 1 10 fd0 fd3 aie busy/adj 1 second digit 10 second digit 1 minute digit 10 minute digit 1hour digit 10 hour digit day digit 1 day digit 10 day digit cs1 controller fout divider ratio setting register fout divider ratio setting register alarm control control register address bit 3 bit 2 bit 1 bit 0 register 0 1 2 3 4 5 6 7 8 9 a b c d e f dt3 dt_on o o 8 128 8 128 te o o o o o test bank sel 1 dt2 dt6 o o 4 64 4 64 ti/tp o o o o o temp bank sel 0 dt1 dt5 o o 2 32 2 32 td1 o o o o o tf stop dt0 dt4 o o 1 16 1 16 td0 o o o o o tie busy/adj digital offset timer counter preset value timer counter data timer settings timer control control register address bit 3 bit 2 bit 1 bit 0 registers v dd =2.4 to 3.6 v v dd =4.5 to 5.5 v
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